The invention relates to a circuit for generating a pulse-shaped signal on an output terminal of the circuit in the case of a predetermined variation of the supply voltage on two power-supply terminals of the circuit. The circuit includes:
a first transistor of a first conductivity type, having its main current path arranged between a first power-supply terminal and a first junction point, PA1 a second transistor of the first conductivity type, having its main current path arranged between the first power-supply terminal and a second junction point, PA1 a first transistor of a second conductivity type, having its main current path arranged between a second power-supply terminal and the first junction point, PA1 a second transistor of the second conductivity type, having its main current path arranged between the second power-supply terminal and the second junction point, PA1 the output terminal being connected to the second junction point, PA1 the gate terminals of the first and second transistors of the first conductivity type being connected to each other and to the first junction point, and the gate terminal of the second transistor of the second conductivity type being connected to the first power-supply terminal. PA1 the gate terminal of the first transistor of the second conductivity type being connected to the first junction point, PA1 and the transistors being dimensioned in such a way that in operation in the case of a supply voltage above a predetermined limit value the voltage on the output terminal approximates to the voltage on the first power-supply terminal and in the case of a supply voltage below the predetermined limit value the voltage on the output terminal approximates to the voltage on the second power-supply terminal.
In electronic bistable circuits, in particular circuits in MOS-technology, a temporary decrease of the supply voltage may result in an indeterminate state of the bistable arrangement and hence a loss of information. Depending on the nominal supply voltage (for example 5 V) and depending on the technology employed the information content of the bistable circuit will no longer be guaranteed if the supply voltage decreases below a specified limit value (for example 3.2 V). If this decrease is caused by intentionally turning off the supply voltage, most electronic devices will generate a power-on pulse in order to reset all bistable circuits to a predetermined initial state when the supply voltage is subsequently turned on.
However, in the case of an unintentional temporary decrease of the supply voltage below said limit value the information in the bistable circuit may change in an indeterminate manner. If subsequently the supply voltage is restored to the nominal value a situation arises in which the instaneously-stored information is not reliable, which may lead to various undesired effects. In such a situation it would therefore also be desirable to generate a reset signal.
A circuit as described above is known from U.S. Pat. No. 4,697,097. The first transistor of the second conductivity type forms the output transistor of a current mirror circuit having an input transistor which is arranged in series with a capacitor between the supply terminals. When the supply voltage is switched on, the charging current of the capacitor is reproduced in the drain of the second transistor of the first conductivity type via this current mirror circuit and via the multiplying current mirror circuit formed by the first and the second transistor of the first conductivity type. Since initially this current is greater than the drain current of the second transistor of the second conductivity type, the voltage at the output node will assume a low value. When the supply voltage reaches its nominal value, the charging current of the capacitor will reduce to zero. The drain current of the second transistor of the second conductivity type will become greater than that of the second transistor of the first conductivity type and as a consequence the voltage at the output node will switch from a low to a high value, so that a reset signal is generated. However, a drawback of this known circuit is that due to the presence of the capacitor no reset signal is generated when temporary decreases of the supply voltage occur.